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1 THz InP Transistor Claims Speed Record

Peter Singer, Editor-in-Chief -- Semiconductor International, 12/21/2007 11:01:00 AM

Northrop Grumman Corp. (Redondo Beach, Calif.) is claiming a new world record for transistor speed with an indium phosphide-based high-electron-mobility transistor (InP HEMT). The device has a maximum frequency of operation of >1 THz (1000 GHz). Researchers at Northrop Grumman’s Space Technology sector, led by Richard Lai, detailed how they developed the terahertz-speed transistor in a technical paper delivered at the 2007 International Electron Devices Meeting (IEDM), held recently in Washington, D.C.

“This represents, to the best of our knowledge, the state-of-the-art in high-frequency transistor capability,” said Dwight Streit, vice president of technical development and microelectronics technology in the company’s space technology sector. “These advancements will enable a new generation of military and commercial applications that operate at higher frequencies with improved performance.”

Speed performance of such a high frequency could not be directly measured and was extrapolated from a three-stage millimeter-wave IC amplifier operating at 340 GHz with >15 dB gain. Tests conducted by NASA’s Jet Propulsion Laboratory in Pasadena, Calif., validated that conclusion.

To develop the terahertz Fmax InP HEMT device, researchers employed several process enhancements. One key process enhancement, as described in the group’s IEDM paper, was the reduction of the gate length from 70 to <50 nm. The gate length footprint of the T-shaped gate is ~35 nm, fabricated with electron-beam lithography (EBL) operating at 20 keV.

Northrop Grumman demonstrated that its sub-50 nm InGaAs/InAlAs/InP HEMT device has achieved extrapolated maximum frequency >1 THz. The extrapolation was validated by the demonstration of a three-stage common source low-noise MMIC amplifier, which exhibits >18 dB gain at 300 GHz and 15 dB gain at 340 GHz. Details of the low-noise amplifier are shown.
Currently, 75 mm diameter InP substrates are used and EBL requires <1 hour for exposure over the wafer. A maximum wafer throughput of 150 wafers per week and 100 wafers per week on 100 mm diameter wafers would be possible on a single EBL system, the researchers noted.

A second key enhancement is the reduction of ohmic contact resistance through a higher-doped cap layer design coupled with an InAs/InGaAs channel grown by molecular beam epitaxy. The sheet resistance of the epitaxial layers is lowered to 75 Ω/sq (compared with 110 Ω/sq in the baseline InP HEMT profile), and the mobility was improved to as high as 15,000 cm2/V-sec (compared with 12,000 cm2/V-sec in the baseline InP HEMT profile). A low contact resistance of 0.05 Ω-mm and a high peak transconductance as high as 2300 msec/mm was measured at 1 V drain bias with a device breakdown typically of 2.5 V and a maximum drain source voltage of 2 V and good device pinch-off characteristics.

Streit said Northrop Grumman — a $30B global defense and technology company with 120,000 employees — has produced compound semiconductor products “by the millions.”

Development of the terahertz-speed InP HEMT was supported by the Defense Advanced Research Projects Agency’s Sub-Millimeter Wave Imaging Focal-Plane Technology program, the U.S. Army Research Laboratory, and internal company funds.

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