Nanoimprint Litho Ramps for HDDs, CMOS
Alexander E. Braun, Senior Editor -- Semiconductor International, 1/8/2008 5:55:00 AM
Nanoimprint technology will solidly enter the hard disk manufacturing arena next year, and find edge-of-the-envelope applications in CMOS high-density memory processes a couple of years after that, according to Mark Melliar-Smith, CEO for Molecular Imprints Inc. (Austin, Texas), a developer and manufacturer of imprint lithography tools.
Listen to the interview (Runtime: 12:34)
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| Mark Melliar-Smith, CEO, Molecular Imprints Inc. |
However, the approach faces alignment challenges, and critics say the cost of making the reticles will be high. Unlike conventional lithography, with mask patterns that are 4× larger than the printed image, nanoimprint is a 1:1 template technology, in which the patterns on the template are impressed in a liquid, which is then cured by ultraviolet light.
Asked about concerns over 1× technology defectivity problems, Melliar-Smith dismissed them. “In our case, the technology used for the manufacture of 1× imprint masks is based on that used to make phase-shift photomasks,” he said. “Our capability to drive down to 1× technology is based on the extension of optical lithography. To extend optical litho to deep subwavelength imaging, the industry has had to use optical proximity correction (OPC) on their photomasks. Many of those features are smaller than those that are going to be actually printed. So you’re already pushing photomask technology well under 4×, as well as in the image placement areas.”
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| IBM has used nanoimprint lithography to print finFET memory devices. The left image shows fins produced using Molecular Imprints’ S-FIL technique, and the right image shows a cross-section of the full structure. (Source: IBM) |
For double patterning, CD control is directly related to image placement on the photomask. “This is driving pattern generator companies to push their image placement capabilities to much better levels than those used for 4×,” Melliar-Smith said. “Both those factors are allowing the industry to move down to a 1× capability.”
Currently, nanoimprint technology is complementary to optical technologies. Molecular Imprints’ tool is specifically designed to mix-and-match with 193 nm optical lithography; it is not meant to replace it. Nanoimprint lithography’s advantage, Melliar-Smith said, is twofold: It can provide high resolution, good line edge roughness (LER), and CD uniformity in a simple, inexpensive manner compared with optical lithography. “With optical lithography, if you want to get below 30 nm, you’re not only talking about 193 immersion, but of double patterning. Thus, all of a sudden what was a simple litho step has now grown into a significant process module involving multiple steps, processing, etching, not to mention design and much more complex overlay and CD control,” Melliar-Smith said. “Nanoimprint offers very high resolution in a system that is not only simpler in its process, but much more cost-effective. If you compare the cost of imprint tools to that of EUV tools, for instance, we’re cheaper by at least a factor of five.”
Toshiba has shown impressive nanoimprint data connected to 18 nm feature size work: <1 nm CD uniformity, <2 nm LER, and the chipmaker confirms down to 20 nm overlay for the Molecular Imprints tool. Toshiba began publishing results six months after taking ownership of the tool, an unusually short time.
“This confirms the simplicity and ease of use of imprint lithography,” Melliar-Smith said. “Since then, there has been continued progress and improvement on defectivity and overlay, and we’re now focused on large markets. In the disk drive and memory industries, there is an enormous advantage and benefit in going to high resolution, which is why the memory roadmaps for lithography are far steeper than those for logic. There’s an enormous pull from both those industries to get nanoimprint to manufacturing. If, like Toshiba, you want to be at 20 nm, there are no other options.”
An important advantage of nanoimprint lithography is that much of its progress has been built on existing CMOS technology. The process technology is essentially identical to that used in photolithography. This means manufacturers do not have to change any of their upstream or downstream technologies, Melliar-Smith said.
Nanoimprint providers and their users are focusing on the high-density memory — such as NAND flash — area of the CMOS world, and are sparing no effort to meet roadmap demands. “Memory is definitely the sector where we have found the most traction for our technology,” Melliar-Smith said. However, he added that although the focus is certainly on high-density memory, it extends beyond just solid-state CMOS memory. “The hard disk drive industry is very important for us, particularly now that they’re working at such small dimensions. Their magnetic domains now need more than just magnetic confinement to prevent crosstalk.”
The CMOS industry expects to benefit from the nanoimprint experience that will result from its use and application by hard disk drive manufacturers. This should give it a fast ramp-up to CMOS, since most of this experience will be directly transferrable to solid-state memory requirements. Nanoimprint is expected to become a factor in hard disk manufacture during 2009, and Melliar-Smith expects it to steeply ramp up into solid-state memory a couple of years after that.
