Date: Feb. 11, 2008

Location: San Jose, Calif.

This course provides an overview of IC packaging and assembly, the current trends and the available options highlighting technical issues and reliability concerns wherever applicable. This course addresses the impact of both the IC and end product requirements for “smaller, better, cheaper” on packaging, assembly and substrate interconnects. It focuses on packaging trends, namely the ball grid array (BGA) and the chip-scale package (CSP), and alternative formats, multichip modules (MCMs), chip-on-board (COB) and 3-D initiatives at both the chip and package levels.

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