The latest news and information on semiconductor lithography, including optical, EUV, e-beam, nanoimprint, maskless and other lithography techniques; exposure tools; resists; and masks/templates.
NuFlare Orders Zeiss Mask Metrology Tool Staff - 12/03/2008
Carl Zeiss SMT disclosed one of the first orders for its next-generation mask metrology system from NuFlare Technology Inc. Developed by Zeiss with support from Sematech, the PROVE metrology system is considered a key building block for masks used in both 193 nm double patterning and EUV lithography. More
Samsung Electronics Orders Zeiss Mask Metrology System Staff - 01/08/2009
Samsung Electronics ordered a mask metrology tool from Carl Zeiss SMT, the second company to order the PROVE system following an order last month from NuFlare Technology, the leading mask writer vendor. The tool uses 193 nm imaging optics to measure masks used in immersion and EUV scanners.
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ASML cuts 1,000 jobs, lowers guidance By Suzanne Deffree, Managing Editor, News - 12/19/2008
“Never before have we witnessed such a sharp and sudden fall-off in lithography system demand, triggered by an unprecedented mix of falling end-demand for semiconductors, weak memory prices and restricted access to capital for our customers,” said Eric Meurice, president and CEO of ASML.
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Photronics Quarterly and Annual Revenue Up Slightly Staff - 12/17/2008
Maskmaker Photronics Inc. (Brookfield, Conn.) said today that its financial results for the fourth quarter of fiscal 2008 were in line with the expectations stated in its Dec. 4 release, with quarterly sales of $103.3M, up 1.7% from $101.6M in fiscal 4Q07. Annual revenue was also up slightly over 2007, thanks to sales for flat panel displays.
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IEDM Panel: Processing Costs Headed Up David Lammers, News Editor - 12/17/2008
With more expensive tools and new process modules coming, IC manufacturers will struggle to maintain the cost-per-function reductions that have broadened the market for semiconductors. The likely introduction of 3-D interconnects, vertical transistors and EUV lithography all will add pressure on wafer processing costs, experts said at an evening panel discussion at the International Electron Devices Meeting going on in San Francisco this week.
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Applied Announces TSV Etcher, In-Fab Mask Inspection Capability David Lammers, News Editor - 12/01/2008
Applied Materials Inc. announced its Silvia deep silicon etcher for creation of the smooth sidewalls required for 3-D interconnects. Also, the company said it is offering a new version of its Aera2 mask inspection tool for use within a fab’s lithography cell, rather than at an external mask shop, needed for double patterning.
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Elpida uses immersion litho for 50-nm process DDR3 SDRAM By Suzanne Deffree, Managing Editor, News - 11/26/2008
The 50-nm process DDR3 SDRAM was developed using 193-nm immersion lithography technology and copper interconnect technology and has a chip size of less than 40-mm-squared.
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SUSS MicroTec Names New CEO Staff - 11/25/2008
Frank Averdung, currently managing director at Carl Zeiss SMS, will move into the CEO position June 1. SUSS MicroTec let its previous CEO go in early October.
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Views on News David Lammers, News Editor, Semiconductor International October 23, 2008 When Is No Really a No?
An executive at a major IC manufacturer likes to tell the story about a meeting in 19... More
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Technical Articles
Advancements in EUV Optics Technology Takaharu Miura and Katsuhiko Murakami, Nikon Corp.; Holly Magoon and Andrew Barada, Nikon Precision Inc.; Martin McCallum, Nikon Precision Europe, 11/01/2008
Extreme ultraviolet lithography (EUVL) is the most likely lithography solution at 22 nm half-pitch and beyond. The transition to EUVL presents significant challenges in the areas of projection and illumination optics, as well as contamination control, but marked improvements have been made in these areas....
Looking for Truth in Conferences Aaron Hand, Executive Editor, Electronic Media, 09/01/2008 Autumn is a busy conference time for the lithography world — one piled on top of another as we make our way through September and October. But it has become increasingly difficult to attend conferences and still avoid the plethora of corporate motivational speeches....
Self-Aligned Double Patterning Gains NAND Flash Favor Chris Bencher, Applied Materials Inc., Santa Clara, Calif., 09/01/2008 Whether you call it frequency doubling, pitch reduction, spacer mask patterning or SADP, sidewall spacer transfer patterning techniques are being adopted at an accelerating rate by NAND flash device makers. This article describes the generic process flows and demonstrated capabilities of the technique....
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Advancements in EUV Optics Technology
