SI CHINA     SI JAPAN
Login  |  Register          Free Newsletter Subscription
Subscribe
Email
Print
Reprint
Learn RSS

Wafer Cleaning and Surface Prep: Evolution to Revolution

Most cleaning challenges are evolutionary as structures get smaller and specs get tighter, but a revolution is in the making, brought on by a variety of new materials, new integration schemes and process flows.

Peter Singer, Editor-in-Chief -- Semiconductor International, 4/1/2007

Sidebars:
Mask Cleaning and Photoresist Removal Challenges

More than 100 steps in a standard IC manufacturing process flow involve wafer cleaning or surface preparation, which include post-resist strip/ash residue removal, native oxide removal, and even selective etching. Although dry processes continue to evolve and offer unique advantages for some applications, most cleaning/surface prep processes are “wet,” involving the use of a mixture of chemicals such as hydrofluoric; hydrochloric (HCl), sulfuric or phosphoric acid; or hydrogen peroxide, along with copious amounts of deionized water for dilution and rinsing. Wafers are typically processed in a batch immersion or batch spray system or, increasingly, with a single-wafer approach. The trend is toward more dilute chemistries, aided by the use of some form of mechanical energy, such as megasonics or jet-spray processing.

An important distinction in wafer cleaning today is that the main goal is not particle removal, but some other function, such as removing native oxide or photoresist residue removal after strip/ash. “In wet cleaning, the application is not so much to remove particles. It’s to make sure when you’re done with the process, you don’t leave particles,” said Jeff Butterbaugh, chief technologist, FSI International (Chaska, Minn.). Of course, this must be done with very high selectivity to minimize material loss of exposed adjacent films. Managing damage and defects is also critical.

FEOL challenges: high-k, metal gates

Those interviewed for this article found it difficult to identify the single most challenging clean, noting that each application has unique requirements, but front-end-of-line (FEOL) cleans — particularly post-gate etch cleans — were noted as a challenging area, particularly with new materials, such as high-k gate dielectrics and metal gates, soon moving into production. Contact area cleans are also challenging, as is the all-wet strip for high-dose ion-implanted resists.

The Raider HT single-wafer cleaning system is a high-throughput platform designed to provide high-performance cleans for FEOL, BEOL and WLP applications. Advanced process software and metrology features monitor and control critical processes that ensure the performance and repeatability critical for single-wafer processes. (Source: Semitool)
It’s not clear yet what metals will be employed for the metal gate, although they will likely be something with which the industry has had some experience, such as tantalum, tungsten, titanium, molybdenum or hafnium. While these materials are somewhat new to fabs, there is some familiarity. “We have been focusing on these issues, and have demonstrated the feasibility of etching such candidate systems with known chemistries. Integrating these new materials requires new cleans and raises new etch/defectivity issues,” said Joel Barnett, senior member of technical staff, advanced gate cleans, Front End Process Division of Sematech (Austin, Texas). “More work needs to be done to develop appropriate chemistries for selective etches and processing in general for advanced gate stacks with high-k and metal gates. Post-etch clean strategies for high-k and metal gate materials require an integrated strategy for implementation into a transistor flow. Preventing corrosion of metal gate/new materials also needs to be considered. New cross-contamination and chemistry requirements need to be developed and clarified. Analyzing for trace metals on high-k films is challenging due to the high background and spectral overlap issues.”

Paul Mertens of IMEC (Leuven, Belgium) noted that some of the dielectric materials are very easily attacked by wet chemicals (e.g., hafnium silicates, lantanum-based dielectrics, etc.), and there’s also the possibility of galvanic corrosion of the gate electrode if different materials are in contact, such as polysilicon on top of metal.

Gate structures can also be sensitive to damage. “The issue here is that the structural strength of the gate, having shrunk considerably, is now to the point where capillary forces and forces induced by fluid flow, implosion of bubbles, and so forth, are sufficient to impart enough energy to the structures to cause structural deformation,” said Dana Scranton, vice president, surface preparation technology, Semitool (Kalispell, Mont.).

1. Somoluminesence imaging shows the interaction of multiple megasonic transducers, which are used to create uniform cleaning without pattern damage. (Source: Applied Materials)
As you’ll soon see, this creates an interesting dilemma: how to make cleaning processes aggressive enough to be effective, yet still highly selective and damage-free. One way is to change “the chemistry” by using new types of chemicals or solvents. Another is to add energy through megasonics or jet sprays. Megasonics is enjoying something of a comeback thanks, in part, to single-wafer tools with multiple transducers that keep damage to a minimum (Fig. 1). The balance between the energy needed to remove a particle and the amount of energy that can cause material loss or damage is shown in Figure 2 .

In the future, perhaps for the 22 nm generation, more advanced 3-D transistor structures such as the finFET could come into play. “A key challenge for finFET devices is going to be cleaning and subsequently measuring the vertical surfaces,” Barnett said. “Cleaning of close-pitch finFET structures [high packing density] with 50-150 nm spacing is going to have similar challenges to those encountered with high-aspect-ratio cleans. Determining the means to clean and measure SiGe and III-V surfaces is yet another challenge.”

2. Physical removal forces the need to remove small particles without excessive etching or damage. (Source: IMEC)

Stripping heavily implanted resist

Another big challenge facing wet processing equipment and materials suppliers is the removal of photoresist after high-dose ion implantation. “A motivation for stripping implanted photoresist with an all-wet process is the reduction of material and dopant loss, which occurs with the traditional ash and wet clean approach,” Butterbaugh said (Fig. 3 ). This need is driven, in part, by the trend toward shallower junctions in the source/drain. “The obvious challenge is to remove the resist completely, while at the same time keeping post-strip defectivity within specifications and not doing damage to the films and structures,” Scranton said.

3. A motivation for stripping implanted photoresist with an all-wet process is the reduction of material and dopant loss, which occurs with the traditional ash and wet clean approach. (Source: FSI International)

Leo Archer, vice president of emerging technology, SEZ Group (Phoenix), adds: “In order to get some of these fairly high-dose implants with very difficult items to remove, you need to be pretty aggressive. We know that dry stripping in and of itself is not the best solution for this because of substrate loss and other challenges. Wet cleans need to be quite aggressive to remove these resists. The compatibility of tungsten to oxidizers in particular things like peroxide is a concern, selectivity being the biggest challenge. You need long exposure times for high-dose implant resists, but once you do that, you just risk causing more and more damage to tungsten.”

Scranton said that wet stripping of high-dose implanted resist brings with it a new set of problems. “A significant issue with high-dose implant strip is the temperature at which a wet tool must operate to achieve the removal of the resist. With the exception of the use of a formulated FEOL solvent, the juice dejour is high-temperature sulfuric-based solutions. Most of the wet tools being used are operating at very high temperatures, on the order of 160°C. This is going to create significant reliability and contamination issues.” He added that Semitool has a solution that eliminates these issues, but noted that to make the entire process work effectively at all levels, there needs to be a “tuning” of the resist/litho process to account for materials, lithography needs and resist removal. “Ultrahigh-temperature sulfuric acid solutions will get 95% of the job done, but not without some issues. The other 5% will need optimization. I believe ultimately the solution is to come up with a low-temperature solvent.”

BEOL challenge: low-k

In the back-end-of-line (BEOL), copper cleaning appears to be under control, so the main challenge is cleaning porous low-k dielectrics. “There’s a lot of different things going on with capping layers and metal hard masks and latent porogen removal that need to be sorted out before we really understand how challenging the cleaning processes are going to be,” Butterbaugh said.

“In the case of low-k materials, that storm is on the horizon,” Scranton said. “The low-k materials, as well as the entire copper interconnect process flow, will introduce difficult challenges as the industry migrates to 32 and 22 nm. Porous low-k will be used, and the extreme low-k will pose new challenges for wet processing. Here, upstream processing will prove to be critical to the effectiveness of the cleans, and some post-clean processing may be essential to render the films stable for the downstream steps.”

The ultimate challenge is to keep the effective constant (keff) of the stack low. “As you expose the low-k films, it becomes more complex because they are seriously affected by the nature of the etch and ash condition used to begin with,” Archer said. “When you expose them to certain wet chemistries, certain species — a lot of the time fluoride — causes problems to low-k, where you actually change the structure of the low-k and, as a result, the k effective goes up.”

New chemistries, more energy

The semiconductor industry is in some ways relatively conservative, continually pushing accepted technologies long past what anyone thought was possible. That’s certainly been the case in wet cleaning chemistry, where the venerable two-step RCA wet clean originally developed in the 1960s remains a production workhorse.

The main way engineers have kept the RCA clean going is through the increased use of dilution. “There is a comfort level already established with the chemistries and their interaction to the exposed materials. I expect this to continue until the technology requires a completely different approach,” Barnett said.

“Classical SC1 is 1:2:5 — one ammonia, two peroxide, five water,” said Konstantin Smekalin, CMO of the Wet Cleans Group at Applied Materials (Santa Clara, Calif.).“We’re looking at 1:2:50 and 1:2:80 and so forth — you can see how dilution went up. People figured out with appropriate hardware solutions, appropriate systems methods, they could use more dilute chemistries, and they would very much love to do that.”

Advantages of dilution? You have less chemistry, so it’s easier to rinse and finish off a process. It’s less costly. There’s less environmental impact. It makes it possible to use single-pass, fresh chemicals instead of recirculating. It’s also easier to integrate different chemical steps into the same bath, for instance, in a wet bench.

“People are tending to try to dilute things more and use less overall chemistry when they can,” Butterbaugh said. “It’s just been really slow in being adopted. We continue in our lab to develop more dilute chemistries and to use our lab benchmarks to show that these more dilute chemistry approaches — less tanks, more in situ fresh chemical dispense processes — should be capable. It’s just a matter of transferring that into manufacturing, but people are still being very conservative about introducing some of these new techniques into the manufacturing environment.”

But new techniques are almost certainly required as the RCA clean begins to run out of steam. “We use variants of it, but for the past several years, we have departed from the RCA clean,” Scranton said. “Our single-wafer cleans utilize our proprietary dilute, ozonated chemicals that provide far more effective cleaning with significantly less chemical and significantly less water than conventional RCA cleans. Trying to make the RCA cleans work in a single-wafer tool and getting the productivity and cost-effectiveness demanded by the IDMs is simply not practical. The bottom line is that it’s all about getting energy to the wafer to achieve the objective clean. It isn’t about how to make an RCA clean work — it won’t work going forward.”

Alternatives to the RCA clean include changing the mixture of chemicals, or even going to a solvent. “As we see more and more metals, we tend to change the ratio of ammonium hydroxide to peroxide and still be able to use the chemistry for cleaning, even the new materials. In addition, people are trying some traditional back-end chemistries for the front-end cleans because of new materials coming into the picture,” said Rao Yalamanchili, technology manager of the wet cleans group at Applied Materials.

Mike Legenza, electronic formulated products manager at Air Products (Allentown, Pa.) said, “Compatibility of novel cleaning chemistries with advanced FEOL [gate and electrode] materials and BEOL [porous low-k], while offering acceptable functionality and regulatory compliance, are the key challenges for materials suppliers. Without exception, cost, quality and yield is the 'mantra’ also driving chemical suppliers.”

Out of the two components of the RCA clean — SC1 and SC2, SC2 could be the first to go. “As far as SC2, we’ve shown the ability to eliminate the SC2 mixture, just using dilute HCl in the final rinse, and be just as effective,” Butterbaugh said. “If there’s not a pattern issue, SC1 with megasonics will still be a big part of your basic cleaning process.”

One traditional back-end chemistry falls under the general umbrella of “solvent.” A common solvent used for resist stripping, for example, is n-methyl pyrollidone (NMP). “Indeed, the interest for solvents is growing,” Mertens said. “It is used to address FEOL ashless strip of ion-implanted photoresist with reduced substrate loss and, in BEOL, ashless strip of post low-k etch.”

The downside of solvents is that they’re generally expensive, difficult to dispose of, and often chemically hazardous. Chemical suppliers are also known for their proprietary, sometimes complex mixtures. As a result, IDMs may be concerned that they do not have enough control over the solvent supply, and tend to favor a more generic, more widely available solution. This extends to chemical recycling. “If recycling of the solvent is desired, the effort should focus more on trying to establish processes that work with simple formulations — if possible one component. That would make it much easier and cheaper to recycle these chemistries,” Mertens noted.

“This industry is no longer a community of cowboy scientists,” Smekalin said. “In general, the conservatism of today’s environment in the factory forces even our customers to look at chemistry with more skepticism. They think chemistry has more chances of creating an unforeseen side effect in the flow. If you change the chemistry dramatically — go from inorganic to organic or vice versa — you will likely be introducing changes that you cannot predict all the impact of. That’s why you see RCA sticking around for such a long time. Because it’s such a well-known and benign composition that people know for sure that it won’t cause any side effects. We see quite a bit of interest in our customer base to revise or revisit as many non-chemical methods for cleaning as possible. They are very willing to consider megasonics again. You see people more willing to agree that the physical methods can be assessed more quickly because their positive and negative impact can be seen upfront.”

Yalamanchili said the company is developing both megasonic and non-megasonic solutions. “In both cases, we are applying physical energy to clean particles as well as residues.”

Scranton said Semitool’s megasonic technology “has been demonstrated to achieve relatively high particle removal efficiency without damage to delicate FEOL structures. In our opinion, this technology will extend the use of megasonic cleaning at least to the 32 nm node.”

Archer asks: “Is there a way to add some sort of mechanical energy to cleaning the wafer that will allow you a little bit of extra force for defect removal, but not so much force that you actually cause damage?” While megasonic interest continues, Archer said to expect increasing use and development of mechanical spray-type nozzles. “What we have is the active jet, which helps with mechanical agitation but decreases the damage potential.”

Target specs

Regardless of the application, the biggest challenge in cleaning relates to defectivity issues — not only having the metrology tools needed to detect ever-smaller defects, but also understanding what impact certain size defects truly have on yield and electrical performance. “With pre-diffusion and pre-dep cleans, detection of particles in advanced technologies at one-half CD is very difficult, which makes evaluation of cleaning efficiency very difficult. There is very little published experimental data correlating electrical impact of small particles on circuit performance,” Barnett said. “For that very reason, the ITRS Surface Prep Sub-Technical Working Group is struggling to define those numbers for the future. Trace metallic numbers have remained constant, chiefly because the introduction of the thicker high-k materials minimizes their impact.”

Butterbaugh adds: “We’re looking more closely at the baselines benchmark challenges, and whether they really relate to what’s going on in the manufacturing line. People have tried to compare processes with an aged silicon nitride particle challenge. Has it really been as effective as we’ve assumed for comparing processes? Or do we have to take a closer look at what’s actually happening on in-production wafers?”

According to Mertens, “All particles above a critical size are considered to be killing. Today, the rule of thumb is to define this critical diameter equal to the half-pitch technology node. This is, to my appreciation, still a very good guideline. The trouble is that usually the metrology and monitoring in fabs is often lagging behind on this. This means that implicitly one relies on a more or less reproducible correlation between the number of small particles [just above critical size] and the bigger ones [above the inspection threshold]. Although, in general, if one assumes natural size distributions of particles, this may be valid in a lot of cases, but in some cases, one might have a situation where distributions are very much disturbed. For example, if particle filters have been used that capture with a high efficiency all particles larger than the specified size, while having a high transmission for smaller ones. Another example where one can expect rather narrow particle size distributions is in the CMP area [post-CMP cleans]. Therefore, in general, this is a very dangerous strategy.”

“Right now, we are operating at particle specifications of 60 nm, and in the near future, that will drop to 40 nm,” Scranton added. “Particle density at 60 nm that we are asked to deliver is typically on the order of 0.04 particles per square centimeter on a 300 mm wafer. When it comes to particles of this size and lower, one is faced with a difficult question: 'What are these particles in the first place?’ These particles are smaller than an airborne virus, and can be derived from sources not heretofore considered. Moreover, the reliability of the metrology tools to detect these 'defects’ leaves a lot to be considered. And when we drop to 40 nm and below, we’ll be entering a new world of particle sleuthing. The dynamics of particles of these sizes are already significantly different than 120 nm.”

With metals, the specifications are typically 5 × 109 to 1 × 1010 atoms/cm2 for all metals. “As with particles, the lower metal specification levels give rise to an entirely new approach to process and equipment design,” Scranton said. “It is non-trivial. It’s amazing where you find metals when you start lowering the allowable limits.”

 

Mask Cleaning and Photoresist Removal Challenges

James S. Papanu, Applied Materials , Santa Clara, Calif. 

Cleaning photomasks is becoming more critical for 65 nm technology and below nodes, and requires new approaches and techniques. Conventional wet cleaning processes include a chemistry sequence of sulfuric acid/hydrogen peroxide mixture, followed by ammonium hydroxide/hydrogen peroxide (APM) mixture. However, sub-pellicle defects and photon-induced haze resulting from sulfur residues that remain after cleaning are key challenges for 193 nm photomasks. In addition, photoresist removal for rework and post-etch strip/clean requires similar process flows, resulting in similar challenges.

1. Representative data for patterned 65 nm binary masks showing neutral defect adders and damage-free cleaning.

In collaboration with a customer, we have developed sulfur-free wet cleaning and resist-removal processes based on oxidizing, ammonia and regassed deionized (DI) chemistries. The sulfur-free processes must still provide neutral particle adders, high particle removal efficiency, complete removal of organic contamination or residues, minimal optical property change to chrome antireflective coating (ARC) reflectivity or phase shift of attenuation layers, and no physical damage to sensitive-assist features.

2. Reflectivity change on chrome blanks with repetitive cleaning. The increase in reflectivity was ~0.2% per cleaning cycle, which was well within the customer specification.

With hardware and process optimization for O3/DI organic removal and APM cleaning sequences, plus optional H2/DI cleaning and CO2/DI rinsing, we have been able to meet customer performance requirements. Figure 1 shows representative cleaning data for patterned 65 nm binary masks — repeatable adder-neutral and damage-free performance was achieved. Figure 2 shows reflectivity change on chrome blanks for repetitive cleaning. The reflectivity increase was ~0.2% per clean, indicating optical property integrity well within the customer specification. Further development for dry processing combined with wet processing is also being developed. Oxidizing dry strip chemistry, while easily removing the bulk photoresist layer, gives unacceptable ARC attack, especially at elevated temperatures. Consequently, reducing chemistry dry processes are being evaluated.

Email
Print
Reprint
Learn RSS

Related Content

Related Content

 

By This Author

SPONSORED LINKS



 
Advertisement
SPONSORED LINKS

More Content

  • Blogs
  • Podcasts
  • Videos

Blogs

  • David Lammers
    Views on News

    May 6, 2008
    The Other 450 mm Shoe
    The three companies openly pushing for 450 mm wafers are working on a plan to subsidize the equipmen...
    More
  • David Lammers
    Views on News

    April 9, 2008
    The Donut Mystery
    John Halladay, a clean process manager at Spansion’s Fab 25, brought a good mystery to Sematec...
    More
  • » VIEW ALL BLOGS RSS

Podcasts

Videos

Advertisements





NEWSLETTERS
Plug in and get the latest SI news, trends and industry updates delivered free, directly to your inbox!

SI NewsBreak and Special Reports (Weekdays)
Wafer Processing Report (Monthly)
Lithography Report (Monthly)
Metrology Report (Monthly)
Clean Processing Report (Monthly)
Packaging Report (Twice Monthly)
©2009 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.
Use of this Web site is subject to its Terms of Use | Privacy Policy
Please visit these other Reed Business sites