Aviza Develops Etch/PVD/CVD Tool for 3-D IC R&D

Sally Cole Johnson, Contributing Editor -- Semiconductor International, 6/17/2008 8:22:00 AM

Three primary factors are driving the adoption of 3-D ICs and associated packaging technologies: increased functionality, size shrinks and a lower cost. For through-silicon via (TSV) technology to be adopted in 3-D ICs, the cost has to be right — and there’s a lot of research underway right now to try to drive it down below the $200 mark.

CMOS image sensors using TSV technology are already in production, but memory is not far behind. Once the cost target is met, the use of TSV technology in 3-D ICs is expected to eventually gain widespread adoption from manufacturers, because it significantly reduces the interconnect distance and removes any real limitation on the number of die that can be stacked. This makes smaller form factor devices possible while also improving speed and functionality.

To help make 3-D IC TSV R&D and pilot production more convenient, Aviza Technology Inc. (Scotts Valley, Calif.) has developed a 200/300 mm cluster system that includes etch, physical vapor deposition (PVD) and chemical vapor deposition (CVD) in a 4.4-m-wide × 4.2-m-deep footprint. The Versalis FxP system is designed to provide everything people working on 3-D IC TSV R&D need in one platform to create a via ready for plating.

Aviza has developed a 200/300 mm cluster system that includes etch, PVD and CVD for 3-D IC R&D and pilot production.

The system can perform deep silicon etching, put down an isolation layer, a dielectric sleeve, inside the via to stop cross talk and signal leakage, according to David Butler, Aviza’s director of marketing of the PVD/Etch/CVD Business Unit. At the bottom of the via, where a dielectric contacting metal isn’t a good thing, the system can remove the oxide while leaving the rest on the sidewalls. Then, metal can be placed inside the via before moving off to the plating step (which this system doesn’t do). Each step is linked and, as Butler pointed out, if you get the via etch wrong at the start, it makes it harder not only to fill the via, but also to do the plating.

“Rather than going to an etch vendor, a dielectric vendor and a metal vendor, you can install one platform. The system provides different install options than you’d traditionally have with dedicated tools,” Butler said. “You can link dissimilar processes together — without breaking vacuum — to see if there’s any technical performance benefit from moving directly from the dielectric to the metal, for instance. And once you’ve gotten your process ‘frozen,’ you can either keep this tool as an R&D tool and get more small production-friendly configurations that would have a dedicated process or break the system up to turn it into a dedicated etcher or a metal tool.”

While Butler acknowledged that the system isn’t the fastest tool around because there’s so much functionality packed into it, it is possible to double or triple up some of the dedicated modules to increase throughput, if desired — even though the system is intended as a R&D tool.

Applications for 3-D ICs using TSV technology include CMOS image sensors and other sensors, NAND flash memory, DRAM, SRAM, FPGA and memory processors, amplifiers for LAN and communications for mobile phones and military applications.