SMIC Says 45 nm Process Ready Next Year
David Lammers, News Editor -- Semiconductor International, 6/10/2008 8:15:00 AM
Chiou Feng Chen, vice president of marketing at SMIC, said, “We are confident about developing and qualifying SMIC’s low-power process by the second half of 2009. The high-performance process is targeted to be qualified a few months later.”
SMIC will use its 300 mm Fab 8 in Shanghai for 45 nm manufacturing. SMIC signed an agreement with IBM in December 2007 to transfer IBM’s bulk CMOS technology. Chen said the two companies “aim to collaborate in a long-term partnership” that could extend cooperation to 32 nm and beyond.
SMIC is discussing 45 nm production with “top-tier fabless and IDM companies that have expressed interest in working with SMIC on 45 nm, with some proposing to be lead customers. We have also engaged new customers for the 65 nm and 90 nm logic nodes, with the potential to migrate to 45 nm,” he said. Also, he said China-based customers interested first in using SMIC’s 65 nm low-power technology will be attracted by the potential to migrate to 45 nm.
SMIC is making a concerted effort to climb the technology ladder, and the 45 nm program is key to that goal. A China-based analyst who asked not to be identified said, “SMIC, thus far, lacks the strong service and trust component that TSMC has,” adding that SMIC will continue to attract customers with a lower cost strategy until it can improve its high-end customer relationships. Convincing non-China-based semiconductor companies to run high-end products at SMIC depends on improving yields with reliable delivery, he said.
The 45 nm process will be aimed at logic production, and comes as SMIC attempts to convert capacity from DRAM to logic and flash. The analyst said, “I like the fact that SMIC is reducing its reliance on DRAM. Converting that kind of capacity to logic is tricky, but we saw TSMC/Vanguard do it quite successfully. I’m going to be very interested in how SMIC’s flash play works out.”
Triple Vt offerings
SMIC will offer low-power and high-performance 45 nm processes. The low-power process will target consumer and communication applications, including mobile handsets, digital still/video cameras and personal navigation devices. The high-performance process will be aimed at graphic chips, PC chipsets and microprocessors.
The 45 nm low-power process has a 1.1 V power supply, while the high-performance process uses a 0.9 Vdd with an overdrive capability. The process supports three different threshold voltages (Vt) in the core devices. I/O devices with a 28 Å gate oxide support 5 V and 1.8 V levels. I/Os with a 52 Å gate oxide operate at 1.8, 2.5 and 3.3 V.
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